april 2013 ? 2000 f airchil d semiconductor corporation www.fairchildsemi.com nc7wz07 ? rev. 1. 0 . 7 nc7wz0 7 tinylogic ? uhs dual buffer (open - drain outputs) nc7wz07 tinylogic ? u hs dual buffer (open - drain outputs) features ? ultra - high speed: t p zl 2. 3 ns (typical) ? high i ol output drive: 24 ma at 3 v v c c ? broad v cc operating range: 1.65 v to 5.5 0 v ? power down high impedance inputs/outputs ? over - v oltage tolerance i npu ts f acilitate 5 v to 3 v translation ? proprietary noise/emi reduction circuitry ? ultra - small micropak? p ackage s description the nc7wz07 is a dual buffer with open - drain outputs from fairchilds ultra - high speed (uhs ) s eries of tinylogic?. the device is fabricated with advanced cmos technology to achieve ultra - high speed with high output dri ve , while maintaining low static power dissipation over a broad v cc operating range. the devi c e i s specified to operate over a very broad v cc operating range. the device is specified to operate over the 1.65 v to 5.5 v v cc range. the inputs and outputs are hi gh impedance when v cc is 0 v. inputs tolerate voltages up to 7 v independent of v cc operating voltage. order ing information part number top mark package packing method nc7wz07p6x z07 6 - lead sc70, eiaj sc88 1.25 mm wide 3000 units on tape & reel nc7wz07l 6 x d3 6 - lead micropak ? , 1.00 mm wide 5000 units on tape & reel nc7wz07 fhx d3 6 - lead, micropak2 ? , 1 x 1 mm body, .35 mm pitch 5000 units on tape & reel connection diagram s iee e /iec figure 1. logic symbol
? 2000 f airchild semiconductor corporation www.fairchildsemi.com nc7wz07 ? rev. 1. 0 . 7 2 nc7wz0 7 tinylogic ? u hs dual buffer (open - drain outputs) pin configuration s figure 2. sc70 (top view) figure 3. micropak ? (top throug h view) figure 4. pin 1 orientation notes: 1. aaa represents product code top mark ( see ordering information ). 2. orientation of top mark determines pin o ne location. 3. read ing the top mark left to right, pin one is the lower left pin. pin definitions pin # sc7 0 pin # micropak ? name description 1 1 a 1 input 2 2 gnd ground 3 3 a 2 input 4 4 y 2 output 5 5 v cc supply voltage 6 6 y 1 output function table y= a inputs output a y low logic level low logic level high logic level high impedance output state, open drain
? 2000 f airchild semiconductor corporation www.fairchildsemi.com nc7wz07 ? rev. 1. 0 . 7 3 nc7wz0 7 tinylogic ? u hs dual buffer (open - drain outputs) absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit v cc supply voltage - 0.5 7 .0 v v in dc input voltage - 0.5 7 .0 v v out dc output voltage - 0.5 7 .0 v i ik dc input diode current v in < - 0.5 v - 50 ma i ok dc output diode current v out < - 0 .5 v - 50 ma i out dc output current 50 ma i cc or i g n d dc v cc or ground current 100 ma t stg storage temperature range - 65 +150 c t j junction temperature under bias +150 c t l junction lead temperature (soldering, 10 s econds) +260 c p d power dissipation at +85c sc70 - 6 1 5 0 mw micropak ? ? recommended operating conditions the recommended operating conditions table defines the conditions for actual device operatio n. recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter conditions min. max. unit v cc supply v oltage operating 1.65 5.50 v supply voltage data retention 1.5 5.5 v in input voltage 0 5.5 v v out output voltage 0 5.5 v t r , t f input rise and fall time s v cc at 1.8 v, 0.15 v, 2.5 v 0.2 v 0 20 ns/v v cc at 3.3 v 0.3 v 0 10 v cc at 5.0 v 0.5 v 0 5 t a operating temperature - 40 +8 5 c ? ja thermal resistance sc70 - 6 425 c/w micropak ? ? note: 4. unused inputs must be held high or low. they may not float.
? 2000 f airchild semiconductor corporation www.fairchildsemi.com nc7wz07 ? rev. 1. 0 . 7 4 nc7wz0 7 tinylogic ? u hs dual buffer (open - drain outputs) dc electrical characteristics symbol parameter v cc conditi ons t a = + 25c t a = - 40 to + 8 5c units min. typ. max. min. max. v ih high level input voltage 1.65 to 1.95 0.75v cc 0.75v cc v 2.30 to 5.50 0.70v cc 0.70v cc v il low level input voltage 1.65 to 1.95 0.25v cc 0.25v cc v 2.30 to 5.50 0.30v cc 0.30v cc i lkg high level output leakage current 1.65 to 5.50 v in =v ih , v out =v cc or gnd 5 1 0 a v ol low level output voltage 1.65 v in =v i l , i ol = 100 a 0. 0 0 0.10 0. 0 0 v 1.80 0.0 0 0.1 0 0.10 2.30 0.0 0 0.1 0 0.10 3.00 0.0 0 0.1 0 0.1 0 4.50 0.0 0 0.1 0 0.10 1.65 i ol =4 ma 0.80 0.24 0.24 2.30 i ol =8 ma 0.10 0.30 0.30 3.00 i ol =16 ma 0.16 0.40 0.40 3.00 i ol =24 ma 0.24 0.55 0.55 4.50 i ol =32 ma 0.25 0.55 0.55 i in input leakage current 0 to 5.5 0 ? ? v in ? ? 5.5 v 0. 1 1 . 0 a i off power off leakage current 0 v in or v out =5.5 v 1 10 a i cc quiescent supply current 1.65 to 5.50 v in =5.5 v, gnd 1 1 0 a
? 2000 f airchild semiconductor corporation www.fairchildsemi.com nc7wz07 ? rev. 1. 0 . 7 5 nc7wz0 7 tinylogic ? u hs dual buffer (open - drain outputs) ac electrical characteristics symbol parameter v cc conditions t a = + 25c t a = - 40 to + 8 5c units figure mi n. typ. max. min. max. t p zl , t p lz propagation delay 1.65 c l =50 pf, r u =500 ? ? r d=500 ? ? v i =2 x v cc 1.8 6.6 11.5 1.8 12.6 ns figure 5 f igure 6 1.80 1.8 5.5 9.5 1.8 10.5 2.50 0.20 1.2 3.7 5.8 1.2 6.4 3.30 0.30 0.8 2.9 4.4 0. 8 4.8 5.00 0.50 0.5 2.3 3.5 0.5 3.9 1.65 c l =50 pf, r u =500 ? ? r d=500 ? ? v i =2 x v cc 1.8 5.5 11.5 1.8 12.6 1.80 1.8 4.3 9.5 1.8 10.5 2.50 0.20 1.2 2.8 5.8 1.2 6.4 3.30 0.30 0.8 2.1 4.4 0.8 4.8 5.00 0.50 0.5 1.4 3.5 0.5 3.9 c in input capacitance 0 2.5 pf c out output capacitance 0 4.0 c pd power dissipation capacitance ( 5 ) 3.30 3 pf figure 7 5.00 4 not e: 5. c pd is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (i ccd ) at no output l o ading and operating at 50% duty cycle. c pd is related to i ccd dynamic operating current by the expressio n: i ccd =(c pd )(v cc )(f in )+(i cc static). notes: 6. c l includes load and stray capacitance. 7. input prr = 1.0mhz, t w = 500ns. figure 5. ac test circuit figure 6. ac waveforms note: 8. input=ac waveform; t r =t f =1.8ns. 9. prr= variable; duty cycle =50% . figure 7. i ccd test circuit
? 2000 f airchild semiconductor corporation www.fairchildsemi.com nc7wz07 ? rev. 1. 0 . 7 6 nc7wz0 7 tinylogic ? u hs dual buffer (open - drain outputs) physical di mensions figure 8. 6 - lead, sc70, eiaj sc88 , 1.25 mm wide package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and /or date on the drawing and contact a f airchild semiconductor representative to verify or obtain the most recent revision. package specifications do not expand the terms of fairchilds worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always vi sit fairchild semiconductors online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . package designator tape section cavity number cavity status cover type status p 6 x leader (start end) 125 (typical ) empty sealed carrier 3000 filled sealed trailer (hub en d) 75 (typical ) empty sealed detail a scale: 60x b 1.90 2.00 0.20 0.50 min 1.00 0.80 1.10 0.80 0.10 c 0.25 0.10 0.46 0.26 0.20 gage plane (r0.10) 30 0 seating plane c 0.10 0.00 notes: unless otherwise specified a) this package conforms to eiaj sc-88, 1996. b) all dimensions are in millimeters. c) dimensions do not include burrs or mold flash. d) drawing filename: mkt-maa06arev6 2.100.30 0.10 a b 0.65 1.30 (0.25) 0.30 0.15 1 1.25 0.10 3 1.30 0.40 min see detail a land pattern recommendation 6 a 4 c 0.65 l symm pin one
? 2000 f airchild semiconductor corporation www.fairchildsemi.com nc7wz07 ? rev. 1. 0 . 7 7 nc7wz0 7 tinylogic ? u hs dual buffer (open - drain outputs) physical dimensions figure 9. 6 - lead, micropak?, 1.0 mm wide package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and /or date on the drawing and contact a fairchild semiconduc tor representative to verify or obtain the most recent revision. package specifications do not expand the terms of fairchilds worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semic onductors online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . package designator tape section cavity number cavity status cover type status l6 x leader (start end) 125 (typical ) empty sealed carrier 5 000 filled sealed trailer (hub end) 75 (typical ) empt y sealed 2. dimensions are in millimeters 1. conforms to jedec standard m0-252 variation uaad 4. filename and revision: mac06arev4 notes: 3. drawing conforms to asme y14.5m-1994 top view recommened land pattern bottom view 1.45 1.00 a b 0.05 c 0.05 c 2x 2x 0.55max 0.05 c (0.49) (1) (0.75) (0.52) (0.30) 6x 1x 6x pin 1 detail a 0.075 x 45 chamfer 0.25 0.15 0.35 0.25 0.40 0.30 0.5 (0.05) 1.0 5x detail a pin 1 terminal 0.40 0.30 0.45 0.35 0.10 0.00 0.10 c b a 0.05 c c 0.05 c 0.05 0.00 5x 5x 6x (0.13) 4x 6x pin 1 identifier (0.254) 5. pin one identifier is 2x length of any 5 other line in the mark code layout.
? 2000 f airchild semiconductor corporation www.fairchildsemi.com nc7wz07 ? rev. 1. 0 . 7 8 nc7wz0 7 tinylogic ? u hs dual buffer (open - drain outputs) physical dimensions figure 10. 6 - lead, micropak2 ? , 1 x 1 mm body, .35 mm pitch package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and /or date o n the drawing and contact a fairchild semiconductor representative to verify or obtain the most recent revision. package specifications do not expand the terms of fairchilds worldwide terms and conditions, specifically the warranty therein, which covers f airchild products. always visit fairchild semiconductors online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . package designator tape section cavity number cavity status cover type status fh x leader (start end) 125 (typical) empty sealed carrier 5000 filled sealed trailer (hub end) 75 (typical) empty sealed 1.00 b. dimensions are in millimeters. c. dimensions and tolerances per asme y14.5m, 1994 notes: a. complies to jedec mo-252 standard 0.05 c a b 0.55max 0.05 c c 0.35 0.09 0.19 1 2 3 0.35 0.25 5x 6x detail a 0.60 (0.08) 4x (0.05) 6x 0.40 0.30 0.075x45 chamfer 5x 0.40 0.35 1x 0.45 6x 0.19 top view bottom view 0.66 0.10 c b a .05 c 0.89 pin 1 0.05 c 2x 2x 1.00 d. landpattern recommendation is based on fsc e. drawing filename and revision: mgf06arev3 0.52 0.73 0.57 0.20 6x 1x 5x recommended land pattern for space constrained pcb detail a pin 1 lead scale: 2x alternative land pattern for universal application design. 0.90 min 250um 6 5 4 0.35 (0.08) 4x side view
? 2000 f airchild semiconductor corporation www.fairchildsemi.com nc7wz07 ? rev. 1. 0 . 7 9 nc7wz0 7 tinylogic ? u hs dual buffer (open - drain outputs)
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